DocumentCode :
2035780
Title :
BIST and boundary scan: a champion´s view
Author :
Campbell, R.L.
Author_Institution :
AT&T Eng. Res. Center, USA
fYear :
1994
fDate :
10-12 May 1994
Firstpage :
733
Lastpage :
741
Abstract :
Reflecting on lessons learned from carrying the mantle of “Champion” for BIST and boundary scan technology for four years, I find the reasons for adoption of these methods to be somewhat different than I at first supposed. Nevertheless, BIST and boundary scan have made strong inroads, and I expect a rapid expansion of their application from this point forward. In the process, I believe that barriers will be breached which will encourage adoption of more aggressive built-in-quality strategies. The nature of these strategies can be to some extent be predicted by examining shortfalls in BIST and boundary scan as currently implemented
Keywords :
Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Design engineering; Investments; Prototypes; Research and development; Research and development management;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electro/94 International. Conference Proceedings. Combined Volumes.
Conference_Location :
Boston, MA
Print_ISBN :
0-7803-2630-X
Type :
conf
DOI :
10.1109/ELECTR.1994.472651
Filename :
472651
Link To Document :
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