DocumentCode
2036152
Title
Scalable power delivery design methodology for SoC on cost driven platforms
Author
Cai, Kinger Xingjian ; Ji, Steven Yun
Author_Institution
Intel Corporation, Santa Clara, CA, United States
fYear
2015
fDate
10-13 May 2015
Firstpage
1
Lastpage
4
Abstract
A scalable power delivery analysis methodology is described for SoCs targeted at cost-driven platforms. The methodology is applied at different design stages to consolidate a hundred independent power supplies at bump level to half that at solder ball level and to five major power supplies at board level.
Keywords
Couplings; Noise; Power supplies; Rails; Regulators; Routing; System-on-chip; cost driven SoC platform; power rails consolidation and isolation; scalable power delivery Design; small form factor;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal and Power Integrity (SPI), 2015 IEEE 19th Workshop on
Conference_Location
Berlin, Germany
Type
conf
DOI
10.1109/SaPIW.2015.7237389
Filename
7237389
Link To Document