Title :
Fast timed cosimulation of HW/SW implementation of embedded multiprocessor SoC communication
Author :
Yoo, Sungjoo ; Nicolescu, Gabriela ; Gauthier, Lovic ; Jerraya, Ahmed A.
Author_Institution :
SLS Group, TIMA Lab., Grenoble, France
Abstract :
To fast evaluate HW/SW implementation of multiprocessor SoC communication, we present a method to simulate operating systems (OSs) on a simulation host without running instruction set simulators and generic OS simulation models. The method enables fast timed OS simulation including the preemption of task execution. Together with the fast simulation of synthesizable HW code (e.g. in synthesizable C), it will enable fast evaluation of HW/SW implementation of multiprocessor SoC communication
Keywords :
circuit simulation; embedded systems; hardware-software codesign; multiprocessing systems; HW/SW implementation; embedded multiprocessor SoC communication; fast timed cosimulation; generic OS simulation models; operating systems; preemption; synthesizable HW code; Communication channels; Communication networks; Communication switching; Laser sintering; Network-on-a-chip; Operating systems; Protocols; Space exploration; Switches; System-on-a-chip;
Conference_Titel :
High-Level Design Validation and Test Workshop, 2001. Proceedings. Sixth IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
0-7695-1411-1
DOI :
10.1109/HLDVT.2001.972811
