Title :
Constraints specification at higher levels of abstraction
Author :
Balarin, Felice ; Burch, Jerry ; Lavagno, Luciano ; Watanabe, Yosinori ; Passerone, Roberto ; Sangiovanni-Vincentelli, Alberto
Author_Institution :
Cadence Berkeley Labs., CA, USA
Abstract :
We are proposing a formalism to express performance constraints at a high level of abstraction. The formalism allows specifying design performance constraints even before all low level details necessary to evaluate them are known. It is based on a solid mathematical foundation, to remove any ambiguity in its interpretation, and yet it allows quite simple and natural specification of many typical constraints. Once the design details are known, the satisfaction of constraints can be checked either by simulation, or by formal techniques like theorem proving, and, in some cases, by automatic model checking
Keywords :
constraint theory; finite state machines; formal specification; high level synthesis; abstraction; automatic model checking; design performance constraints; formal techniques; performance constraints; theorem proving; Computer languages; Constraint theory; Control systems; Cost function; Engines; Laboratories; Process design; Real time systems; Solids; Unified modeling language;
Conference_Titel :
High-Level Design Validation and Test Workshop, 2001. Proceedings. Sixth IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
0-7695-1411-1
DOI :
10.1109/HLDVT.2001.972819