Linear transformations and exact minimization of BDDs

Author

Gunther, Wolfgang ; Drechsler, Rolf

Author_Institution

Inst. of Comput. Sci., Albert-Ludwigs-Univ., Freiburg, Germany

fYear

1998

fDate

19-21 Feb 1998

Firstpage

325

Lastpage

330

Abstract

We present an exact algorithm to find an optimal linear transformation for the variables of a Boolean function to minimize its corresponding ordered Binary Decision Diagram (BDD). To prune the huge search space, techniques known from algorithms for finding the optimal variable ordering are used. This BDD minimization finds direct application in FPGA design. We give experimental results for a large variety of circuits to show the efficiency of our approach

Keywords

Boolean functions; field programmable gate arrays; logic CAD; minimisation; Boolean function; FPGA design; binary decision diagram; optimal linear transformation; optimal variable ordering; ordered BDD minimization; Binary decision diagrams; Boolean functions; Circuit synthesis; Circuits; Computer science; Data structures; Design methodology; Field programmable gate arrays; Input variables; Logic design; Minimization; Minimization methods;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on

Conference_Location

Lafayette, LA

ISSN

1066-1395

Print_ISBN

0-8186-8409-7

Type

conf

DOI

10.1109/GLSV.1998.665287

Filename

665287

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2037132