DocumentCode
2037609
Title
Current Control Method Using Voltage Deadbeat Control with Multi Sampling Pulse Compensation for Single Phas Utility Interactive Inverter with FPGA based Hardware Controller
Author
Shimada, Eigo ; Yokoyama, Tomoki
Author_Institution
Tokyo Denki Univ., Saitama
fYear
2005
fDate
Sept. 2005
Firstpage
369
Lastpage
374
Abstract
In this paper, a new control method for the utility interactive inverter based on the deadbeat control with FPGA bas hardware controller is proposed. Deadbeat control is one method to ensure the output voltage or current matches to t references at the sampling instant, so adopting this control method to the utility interactive inverter, the response the system is much improved with small LC filter component compared with the conventional PI control. which resu in the improvement of the cost performance of the inverter. Also, to utilize the capability of FPGA based hardware controller, a multi sampling method is proposed, which enables 1MHz sampling while the carrier period to improve the control accuracy. All the control circuit for the proposed current control method using voltage deadbeat cont and PLL control with quasi-dq transformation with multi sampling method are implemented in FPGA based hardware controller. The design concept of the controller is also described, and the advantages and the disadvantage are discuss through simulations and experiments.
Keywords
compensation; control system analysis; control system synthesis; electric current control; field programmable gate arrays; invertors; phase locked loops; sampling methods; voltage control; FPGA based hardware controller; PI control; PLL control; control circuit; current control method; multisampling pulse compensation; quasi-dq transformation; single phase utility interactive inverter; small LC filter component; voltage deadbeat control; Control systems; Costs; Current control; Field programmable gate arrays; Hardware; Matched filters; Pi control; Pulse inverters; Sampling methods; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Telecommunications Conference, 2005. INTELEC '05. Twenty-Seventh International
Conference_Location
Estrel Hotel, Berlin, Germany
Print_ISBN
978-3-8007-2905-0
Type
conf
DOI
10.1109/INTLEC.2005.335122
Filename
4134361
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