DocumentCode
2037909
Title
A load-sharing architecture for high performance optimistic simulations on multi-core machines
Author
Vitali, Roberto ; Pellegrini, Alessandro ; Quaglia, Francesco
Author_Institution
DIIAG, Sapienza Univ. di Roma, Rome, Italy
fYear
2012
fDate
18-22 Dec. 2012
Firstpage
1
Lastpage
10
Abstract
In Parallel Discrete Event Simulation (PDES), the simulation model is partitioned into a set of distinct Logical Processes (LPs) which are allowed to concurrently execute simulation events. In this work we present an innovative approach to load-sharing on multi-core/multiprocessor machines, targeted at the optimistic PDES paradigm, where LPs are speculatively allowed to process simulation events with no preventive verification of causal consistency, and actual consistency violations (if any) are recovered via rollback techniques. In our approach, each simulation kernel instance, in charge of hosting and executing a specific set of LPs, runs a set of worker threads, which can be dynamically activated/deactivated on the basis of a distributed algorithm. The latter relies in turn on an analytical model that provides indications on how to reassign processor/core usage across the kernels in order to handle the simulation workload as efficiently as possible. We also present a real implementation of our load-sharing architecture within the ROme OpTimistic Simulator (ROOT-Sim), namely an open-source C-based simulation platform implemented according to the PDES paradigm and the optimistic synchronization approach. Experimental results for an assessment of the validity of our proposal are presented as well.
Keywords
discrete event simulation; distributed algorithms; multiprocessing systems; parallel architectures; performance evaluation; LP; PDES; ROOT-Sim; ROme OpTimistic Simulator; distributed algorithm; high performance optimistic simulations; kernel instance simulation; load sharing architecture; logical processes; multicore machines; multiprocessor machines; open-source C-based simulation platform; parallel discrete event simulation; rollback techniques;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing (HiPC), 2012 19th International Conference on
Conference_Location
Pune
Print_ISBN
978-1-4673-2372-7
Electronic_ISBN
978-1-4673-2370-3
Type
conf
DOI
10.1109/HiPC.2012.6507510
Filename
6507510
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