Title :
VHDL design automation and data modeling
Author :
Tian Zhong ; Shen Yongchao
Author_Institution :
Southeast Univ., Nanjing, China
Abstract :
This paper presents a high-level, integrated, simulation-oriented design automation environment for VHDL. Much emphasis is placed on VHDL data modeling, which is central to solving the large problem of data management for design automation systems and is a key to system integration. An intermediate representation format of VHDL, and an inner data model that is suitable for the VHDL semantics are proposed for modeling and simulating VLSI circuits.<>
Keywords :
VLSI; circuit CAD; circuit analysis computing; data structures; database management systems; digital simulation; specification languages; VHDL data modeling; VHDL design automation; VHDL semantics; VLSI circuit simulation; circuit modeling; data modeling; design automation systems; inner data model; integrated simulation-oriented design automation; system integration; Computational modeling; Computer aided engineering; Design automation; Electronic design automation and methodology; Graphics; Hardware; Information analysis; Libraries; Logic; Radio access networks;
Conference_Titel :
TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on
Conference_Location :
Beijing, China
Print_ISBN :
0-7803-1233-3
DOI :
10.1109/TENCON.1993.320057
