DocumentCode
2039456
Title
Petri-net and GA based approach to modeling, scheduling, and performance evaluation for wafer fabrication
Author
Chen, Jyh-Horng ; Fu, Li-Chen ; Lin, Ming-Hung
Author_Institution
Dept. of Comput. Sci. & Inf. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
4
fYear
2000
fDate
2000
Firstpage
3403
Abstract
A significant amount of risk is involved in the wafer fabrication due to huge investment costs, long production cycle time, and short production life cycle. In this paper, a genetic algorithm (GA) embedded search strategy over a hybrid color-timed Petri-net (HCTPN) for wafer fabrication is proposed. Through the HCTPN model, all possible behaviors of the wafer manufacturing systems such as WIP status and machine status can be completely tracked down by the reachability graph of the net. The chromosome representation of the search nodes in GA is constructed directly from the HCTPN model, recording the information about the appropriate scheduling policy for each workstation in the fabrication. A better chromosome found by GA is received by the HCTPN based schedule builder, and then a near-optimal schedule is generated
Keywords
Petri nets; genetic algorithms; graph theory; production control; semiconductor device manufacture; genetic algorithm; hybrid color-timed Petri-net; optimisation; production control; reachability graph; scheduling; search strategy; semiconductor device manufacture; wafer fabrication; Biological cells; Costs; Fabrication; Genetic algorithms; Investments; Job shop scheduling; Manufacturing systems; Production; Semiconductor device modeling; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Robotics and Automation, 2000. Proceedings. ICRA '00. IEEE International Conference on
Conference_Location
San Francisco, CA
ISSN
1050-4729
Print_ISBN
0-7803-5886-4
Type
conf
DOI
10.1109/ROBOT.2000.845245
Filename
845245
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