Title :
Experimental characterization of dummies impact on interconnects propagation performance. Optimization of dummy sizes for the CMOS 22 nm technology node
Author :
Blampey, B. ; Gallitre, M. ; Farcy, A. ; Poncharra, J. ; Bermond, C. ; Flechet, B.
Author_Institution :
UMR CNRS 5130, Univ. de Savoie, Le Bourget du Lac
Abstract :
Based on experimental characterization, the impact of dummies on interconnects propagation performance is investigated. The study is focused on the impact of sizes and placements of these dummies. First a method to quantify impact of dummies on delay is detailed. Next we show that dummy sizes can be optimized to minimize their impacts on interconnects performance of the 22 nm node.
Keywords :
CMOS integrated circuits; integrated circuit interconnections; CMOS technology node; dummies impact; interconnects propagation; Attenuation; CMOS technology; Copper; Delay; Dielectric constant; Dielectric materials; Etching; Inductance; Magnetic fields; Very large scale integration;
Conference_Titel :
Signal Propagation on Interconnects, 2008. SPI 2008. 12th IEEE Workshop on
Conference_Location :
Avignon
Print_ISBN :
978-1-4244-2317-0
Electronic_ISBN :
978-1-4244-2318-7
DOI :
10.1109/SPI.2008.4558373
