Title :
Weak write test mode: an SRAM cell stability design for test technique
Author :
Meixner, Anne ; Banik, Jash
Author_Institution :
Intel Corp., Hillsboro, OR, USA
Abstract :
The detection of cell stability and data retention faults in SRAMs has been a time consuming process. In this paper we discuss a new design for test technique called Weak Write Test Mode (WWTM). This technique applies test circuitry which attempts to overwrite the data stored in SRAM cells. It is designed so that only defective cells are overwritten. The resulting test has a shorter test time and improved detection capability. In addition, WWTM has a low silicon area cost and no impact to product performance. Silicon results are reported
Keywords :
SRAM chips; circuit stability; design for testability; fault location; integrated circuit design; integrated circuit testing; DFT method; SRAM cell stability; cell stability detection; data retention fault detection; design for test technique; detection capability improvement; weak write test mode; Circuit faults; Circuit stability; Circuit testing; Costs; Electrical fault detection; Fault detection; Manufacturing; Random access memory; Read-write memory; Silicon;
Conference_Titel :
Test Conference, 1996. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-3541-4
DOI :
10.1109/TEST.1996.556976
