DocumentCode
2040650
Title
A parallel planar lattice architecture for competitively inhibited neural network simulation
Author
He Shinun ; Zhou Fengqi ; Ma Xilun ; Liu Yancheng
Author_Institution
Coll. of Astronaut., Northwestern Polytech. Univ., Xian, China
Volume
2
fYear
1993
fDate
19-21 Oct. 1993
Firstpage
874
Abstract
Competitively inhibited neural network (CINN) appears to be promising in adaptive parameter estimation and pattern classification for its intelligent information processing potential. A neurocomputer of the parallel planar lattice architecture (PPLA) based on transputers for large scale, high speed simulations of the CINN is proposed in this paper. It has an even greater expandability of parallelism and exhibits sufficient flexibility to simulate the CINN of various network configurations and parameters. The experiments demonstrate that the performance of this neurocomputer is almost proportional to the number of processors by using a load balancing algorithm.<>
Keywords
neural nets; parallel architectures; parameter estimation; pattern recognition; performance evaluation; resource allocation; transputer systems; virtual machines; adaptive parameter estimation; competitively inhibited neural network simulation; high speed simulations; intelligent information processing; load balancing algorithm; network configurations; neurocomputer; neurocomputer performance; parallel planar lattice architecture; pattern classification; transputers; Computational modeling; Computer networks; Concurrent computing; Large-scale systems; Lattices; Neural networks; Neurons; Parallel machines; Parallel processing; Parameter estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on
Conference_Location
Beijing, China
Print_ISBN
0-7803-1233-3
Type
conf
DOI
10.1109/TENCON.1993.320152
Filename
320152
Link To Document