DocumentCode :
2040679
Title :
A 1 GHz CMOS analog equalizer for perpendicular magnetic recording
Author :
Meksiri, Sukarasut ; Vichienchom, Kasin ; Wilairat, Decha
Author_Institution :
Fac. of Eng., King Mongkut´´s Inst. of Technol. Ladkrabang, Bangkok, Thailand
fYear :
2010
fDate :
21-24 Nov. 2010
Firstpage :
1521
Lastpage :
1524
Abstract :
This paper describes the design of a CMOS analog discrete-time equalizer for perpendicular magnetic recording (PMR) read channel. In this design the structure of analog FIR filter that places rotating switch matrix between DAC and multiplier has been proposed. It reduces an accumulative switching error in analog samples due to rotating switch matrix. A 7-tap filter circuit based on GPR2 target was designed and simulated using TSMC 0.18 μm CMOS process parameters. Simulation results show good agreement with the results of the system level simulation. At 1 GHz sampling frequency the equalizer dissipates 1.5 mW.
Keywords :
CMOS analogue integrated circuits; FIR filters; digital-analogue conversion; multiplying circuits; perpendicular magnetic recording; 7-tap filter circuit; CMOS analog discrete-time equalizer; DAC; GPR2 target; TSMC CMOS process parameter; accumulative switching error; analog FIR filter; frequency 1 GHz; multiplier; perpendicular magnetic recording read channel; power 1.5 mW; rotating switch matrix; size 0.18 mum; CMOS analog circuit; FIR; analog signal processing; discrete-time equalizer; perpendicular magnetic recording;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON 2010 - 2010 IEEE Region 10 Conference
Conference_Location :
Fukuoka
ISSN :
pending
Print_ISBN :
978-1-4244-6889-8
Type :
conf
DOI :
10.1109/TENCON.2010.5686144
Filename :
5686144
Link To Document :
بازگشت