Title :
Closing the gap: CPU and FPGA trends in sustainable floating-point BLAS performance
Author :
Underwood, Keith D. ; Hemmert, K. Scott
Author_Institution :
Sandia Nat. Labs., Albuquerque, NM, USA
Abstract :
Field programmable gate arrays (FPGAs) have long been an attractive alternative to microprocessors for computing tasks - as long as floating-point arithmetic is not required. Fueled by the advance of Moore´s law, FPGAs are rapidly reaching sufficient densities to enhance peak floating-point performance as well. The question, however, is how much of this peak performance can be sustained. This paper examines three of the basic linear algebra subroutine (BLAS) functions: vector dot product, matrix-vector multiply, and matrix multiply. A comparison of microprocessors, FPGAs, and reconfigurable computing platforms is performed for each operation. The analysis highlights the amount of memory bandwidth and internal storage needed to sustain peak performance with FPGAs. This analysis considers the historical context of the last six years and is extrapolated for the next six years.
Keywords :
field programmable gate arrays; floating point arithmetic; matrix multiplication; microprocessor chips; reconfigurable architectures; vectors; CPU; FPGA; Moore´s Law; basic linear algebra subroutine functions; field programmable gate arrays; matrix multiplying functions; matrix-vector multiplying functions; memory bandwidth; microprocessors; reconfigurable computing platforms; sustainable floating point arithmetic; vector dot product functions; Algorithms; Bandwidth; Digital signal processing; Electronic mail; Field programmable gate arrays; Floating-point arithmetic; Laboratories; Linear algebra; Microprocessors; Moore´s Law; 65; FPGA; IEEE floating point; arithmetic; re-configurable computing;
Conference_Titel :
Field-Programmable Custom Computing Machines, 2004. FCCM 2004. 12th Annual IEEE Symposium on
Print_ISBN :
0-7695-2230-0
DOI :
10.1109/FCCM.2004.21