Design methodology of a configurable system-on-chip architecture

Author

Wallner, Sebastian

Author_Institution

Dept. of Distributed Syst., Tech. Univ. Hamburg-Harburg, Hamburg, Germany

fYear

2004

fDate

20-23 April 2004

Firstpage

283

Lastpage

284

Abstract

New reconfigurable computing platforms are introduced to overcome some of the limitations of microprocessors and fine-grained reconfigurable devices. One of the promising new architectures are special purpose programmable (SPP) or configurable system-on-chip (CSoC) solutions. This paper presents a new CSoC that offers a programming model and provides high flexibility and adaptability by employing microTask Controller (mTC). They were designed to provide high performance for real-time signal processing and for a broad range of applications exhibiting high degrees of parallelism.

Keywords

integrated circuit design; microcontrollers; reconfigurable architectures; system-on-chip; configurable system-on-chip architecture; integrated circuit design; microtask controller; programming model; real time signal processing; reconfigurable computing platforms; special purpose programmable solutions; Computer architecture; Control systems; Design methodology; Memory management; Parallel processing; Plasma materials processing; Random access memory; Read-write memory; Resource management; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Field-Programmable Custom Computing Machines, 2004. FCCM 2004. 12th Annual IEEE Symposium on

Print_ISBN

0-7695-2230-0

Type

conf

DOI

10.1109/FCCM.2004.27

Filename

1364642