DocumentCode :
2042257
Title :
Assembly analysis of Cu/Ni/SnAg microbump for stacking thin chips in a fine pitch package using a wafer-level underfill
Author :
Chang-Chun Lee ; Tsung-Fu Yang ; Kuo-Shu Kao ; Ren-Chin Cheng ; Chau-Jie Zhan
Author_Institution :
Dept. of Mech. Eng., Chung Yuan Christian Univ., Chungli, Taiwan
fYear :
2012
fDate :
13-16 Dec. 2012
Firstpage :
1
Lastpage :
7
Abstract :
To enhance assembly quality and mechanical reliability of microbumps during both stacking process of multi thin chips and temperature cycling tests, a novel fabricated technique of wafer level underfill (WLUF) is proposed to resolve the foregoing concerned problem. However, the occurrence of a serious warped condition or gap reduction between stacked chips is observed through the assembly procedures of WLUF with a thermal-compression approach. This is harmful to the objective achievements of a three-dimensional integrated circuits package. In order to address this urgent issue, the research presents a process-oriented stress simulation based on finite element method to find the root cause as compared with experimental data. The analytic results indicate that the major influenced factors inducing thermo-mechanical stress within a chip-on-chip package are resulted from a huge temperature difference in WLUF process and mechanical properties of WLUF, respectively. It is found that the use of WLUF with a low coefficient of thermal expansion and a low Young´s modulus is beneficial to reduce plastic strain of critical microbumps. Moreover, through the utilization of layout designs of microbumps array with the arrangements of dummy joints, the significant improvements of co-planarity in a whole packaging structure could be achieved. The simulated predictions point out that as more than three of dummy joints is put nearby the outermost microbump, a warpage variation between the packaging center and chip edge at the top surface of a package under a load of a 2.0 kg bonding force would be smaller than 70 nm. At the same time, a minimum equivalent plastic strain of ~0.87 % generated on the critical microbump is obtained during a thermal cycling load.
Keywords :
Young´s modulus; copper alloys; fine-pitch technology; finite element analysis; integrated circuit layout; integrated circuit packaging; integrated circuit reliability; lead bonding; nickel alloys; silver alloys; thermal expansion; thermal stresses; three-dimensional integrated circuits; tin alloys; Cu-Ni-SnAg; WLUF fabricated technique; assembly quality enhancement; chip-on-chip package; dummy joints; fine pitch package; finite element method; gap reduction; layout designs; low Young´s modulus; low coefficient of thermal expansion; mechanical properties; mechanical reliability; microbump assembly analysis; microbumps array; multithin chips; packaging structure; plastic strain; plastic strain reduction; process-oriented stress simulation; stacking process; thermal cycling load; thermal-compression approach; thermo-mechanical stress; three-dimensional integrated circuit package; wafer level underfill; warpage variation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Materials and Packaging (EMAP), 2012 14th International Conference on
Conference_Location :
Lantau Island
Print_ISBN :
978-1-4673-4945-1
Electronic_ISBN :
978-1-4673-4943-7
Type :
conf
DOI :
10.1109/EMAP.2012.6507854
Filename :
6507854
Link To Document :
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