Frequency Synthesizer using TDTL with Enhanced Performance

An enhanced frequency synthesizer using a first order time delay tanlock loop (TDTL) is proposed in this work. Two adaptation mechanisms are introduced to improve the performance of the synthesizer. The first method compensates for the errors that resulted from the division process within the loop. The other adaptation technique is targeted at improving the locking performance of the loop. The later method is based on sensing the frequency at an earlier stage so that the error signal can be adapted for any frequency disturbance. The new developed synthesizer offers rapid acquisition and improved tracking performance over a wide locking range.