• DocumentCode
    2043457
  • Title

    Automatic multi channel serial I/O interface using FPGA

  • Author

    Fongjun, Theerapong ; Tantaworrasilp, Apicit ; Kwansud, Phanuphan ; Bunnun, Pished ; Theeraworn, Chonlada

  • Author_Institution
    Nat. Electron. & Comput. Technol. Center, Pathumthani, Thailand
  • fYear
    2011
  • fDate
    13-18 Sept. 2011
  • Firstpage
    864
  • Lastpage
    867
  • Abstract
    The Digital input and output signal interface (DIO) is an important component for a machine wanted to be interacted with its environment. Although a main processing unit (MPU) used in the machine has its own DIO channel, for some cases, the machine needs to use more DIO channel than those the MPU can provide. To avoid this problem, a DIO board interfaced directly to the MPU via serial communication is designed. If the MPU connect to multiple DIO boards directly, it will waste sometime to process of communication data, for example processing time is check ready to receive or sending signals. To reduce the unnecessary processing time of the MPU and possibility to have many DIO boards connected, a serial interface unit based on FPGA is developed to help the MPU to communicate with DIO boards. The FPGA unit automatically reads serial signals from each DIO boards and save interpreted data to share registers for MPU to read. The FPGA unit also spontaneously reads registers written by MPU and send registers values to DIO boards automatically. The FPGA unit is XC3S400-4PQ208 chip programmed by VHDL language and has been tested with 3 DIO boards simultaneously. The experiment result shows that the FPGA unit is able to receive and send data between the MPU and DIO boards.
  • Keywords
    field programmable gate arrays; hardware description languages; input-output programs; microprocessor chips; peripheral interfaces; DIO channel; FPGA; MPU; VHDL language; XC3S400-4PQ208 chip; digital input and output signal interface; main processing unit; multichannel serial I/O interface; serial communication; Field programmable gate arrays; Latches; Middleware; Pins; Protocols; Radiation detectors; Registers; FPGA; digital input and output interface; main processing unit; serial communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SICE Annual Conference (SICE), 2011 Proceedings of
  • Conference_Location
    Tokyo
  • ISSN
    pending
  • Print_ISBN
    978-1-4577-0714-8
  • Type

    conf

  • Filename
    6060629