Fault-tolerant duplex logical systems

Author

Watanabe, S.

Author_Institution

Graduate Sch. of Inf., Teikiyo Univ. of Technol., Chiba, Japan

Volume

4

fYear

1993

fDate

19-21 Oct. 1993

Firstpage

248

Abstract

The paper presents, first of all, a definition of failure logical functions and an extention of boolean functions by defined failure logical functions. Then, asymmetrically failure logical circuits having only "0" failure and only "1" failure feature are assumed as fail-safe logical circuits. An architecture of the fail-safe logical system, which consisted of said logical circuits is depicted. And then, a structural principle and the practical example of fault-tolerant logical systems composed of duplex fail-safe logical systems having detectable functions of fault systems with fail-safe features are specified.<>

Keywords

Boolean functions; fault tolerant computing; logic circuits; asymmetrically failure logical circuits; boolean functions; fail-safe logical system; failure logical functions; fault-tolerant duplex logical systems; fault-tolerant logical systems; Boolean functions; Circuit faults; Computer networks; Electrical fault detection; Fault detection; Fault tolerance; Fault tolerant systems; Informatics; Input variables; Paper technology;

fLanguage

English

Publisher

ieee

Conference_Titel

TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on

Conference_Location

Beijing, China

Print_ISBN

0-7803-1233-3

Type

conf

DOI

10.1109/TENCON.1993.320479

Filename

320479