Title :
Low conversion ratio VRM design
Author :
Peterchev, Angel V. ; Sanders, Seth R.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
This paper discusses the design considerations for low conversion ratio voltage regulation modules (VRMs) for the next generation of microprocessors, focusing on the handling of large, high-slew-rate current transients. A DC-DC power converter topology which deploys an inductive clamp to handle the unloading transients, while operating at a modest switching frequency, low current ripple and low power dissipation, is discussed. The clamp response is analyzed, and simulation results for a 1 MHz, 100 A, 12-to-1 V VRM are presented
Keywords :
DC-DC power convertors; computer power supplies; microprocessor chips; switching circuits; voltage regulators; 1 MHz; 100 A; 12 to 1 V; DC/DC power conversion; clamp response; converter topology; current ripple; inductive clamp; low conversion ratio VRM design; power dissipation; switching frequency; unloading transients; voltage regulation modules; Analytical models; Artificial intelligence; Capacitors; Clamps; Delay; Microprocessors; Power dissipation; Topology; Transient response; Voltage control;
Conference_Titel :
Power Electronics Specialists Conference, 2002. pesc 02. 2002 IEEE 33rd Annual
Conference_Location :
Cairns, Qld.
Print_ISBN :
0-7803-7262-X
DOI :
10.1109/PSEC.2002.1023034
