Hybrid Si-SiC fast switching cell modelling and characterisation including parasitic environment description by PEEC method

Silicon carbide (SiC) Schottky rectifiers are now available for high voltage (600 V and above). They allow major improvement in power converter efficiency compared with the state-of-the-art of silicon bipolar. In association with latest fast MOSFET in hybrid switching cell (Si MOSFET + SiC diode), switching losses can be dramatically decreased by switching speed improvement. Then, due to high switching speed, the parasitic effects must be taken into account if an accurate description of the cell is needed. Even if intrinsic performances of the new MOSFET are very good (among others, low charges or superjunction technologies), paralleled capacitors and serial inductances of the cell environment limit the practical switching speed. The aim of this work is to propose an accurate model of this new switching cell. This model will be implemented in a temporal simulator in order to give predictive waveforms in losses and EMI investigations in power factor correction. A complete model of the switching cell is presented, which includes intrinsic characteristics of semiconductor with nonlinear capacitance in diode and MOSFET model. Parasitic behaviours are also taken into account with the PEEC method. Experiment and simulation results are compared and they show that accurate waveforms are obtained even in high switching speed