DocumentCode :
2045262
Title :
Sampling, quantization and computational aspects of the quadrature lock-in amplifier
Author :
Leis, John ; Kelly, Colm ; Buttsworth, David
Author_Institution :
Electr., Electron. & Comput. Eng., Univ. of Southern Queensland, Toowoomba, QLD, Australia
fYear :
2012
fDate :
12-14 Dec. 2012
Firstpage :
1
Lastpage :
7
Abstract :
The phase-sensitive or “lock-in” amplifier is a fundamental tool in experimental physics, and is able to extract exceedingly small signals in the presence of noise. The lock-in operates on the principle of synchronous excitation of the system under test, which effectively moves the desired system response above the influence of 1//f noise. The purpose of the paper is twofold: (i) to investigate the numerical aspects of implementation of the lock-in signal processing, particularly for computationally resource-constrained environments; and (ii) to investigate the tradeoff between A/D resolution and oversampling rates in this particular application, where a synchronous reference signal is available. We conclude that the quantization, sampling rate, and numerical precision aspects are somewhat interrelated when the best possible performance in terms of noise rejection is required.
Keywords :
1/f noise; amplifiers; quantisation (signal); signal resolution; signal sampling; 1/f noise; A-D resolution; computational aspects; experimental physics; lock-in signal processing; noise rejection; oversampling rates; phase-sensitive amplifier; quadrature lock-in amplifier; quantization aspects; resource-constrained environments; sampling aspects; synchronous excitation; synchronous reference signal; system under test;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing and Communication Systems (ICSPCS), 2012 6th International Conference on
Conference_Location :
Gold Coast, QLD
Print_ISBN :
978-1-4673-2392-5
Electronic_ISBN :
978-1-4673-2391-8
Type :
conf
DOI :
10.1109/ICSPCS.2012.6507974
Filename :
6507974
Link To Document :
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