Title :
Computational complexity of controllability/observability problems for combinational circuits
Author_Institution :
Dept. of Electron. & Commun., Meiji Univ., Kawasaki, Japan
Abstract :
The computational complexity of fault detection problems and various controllability and observability problems for combinational logic circuits are analyzed. It is shown that the fault detection problem is still NP-complete even for monotone circuits limited in fanout, i.e. the number of signal lines which fanouts from a signal line is limited to three. It is also shown that the observability problem for unate circuits is NP-complete, but that the controllability problem for unate circuits can be solved in time complexity O(m), where m is the number of lines in a circuit. Furthermore, two classes of circuits, called k-binate-bounded circuits and k-bounded circuits, are introduced. For k-binate-bounded circuits, the controllability problem is solvable in polynomial time, and for k-bounded circuits, the fault detection problem is solvable in polynomial time, when k>
Keywords :
combinatorial circuits; computational complexity; controllability; error detection; observability; NP completeness; adders; combinational circuits; computational complexity; controllability; decoders; fanout; fault detection problems; logic circuits; observability; one-dimensional cellular arrays; time complexity; two-dimensional cellular arrays; Adders; Circuit faults; Circuit testing; Combinational circuits; Computational complexity; Controllability; Decoding; Electrical fault detection; Observability; Polynomials;
Conference_Titel :
Fault-Tolerant Computing, 1988. FTCS-18, Digest of Papers., Eighteenth International Symposium on
Conference_Location :
Tokyo, Japan
Print_ISBN :
0-8186-0867-6
DOI :
10.1109/FTCS.1988.5298