DocumentCode :
2046363
Title :
Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware
Author :
Danne, Klaus ; Platzner, Marco
Author_Institution :
Dept. of Comput. Sci., Paderborn Univ.
fYear :
2006
fDate :
25-29 April 2006
Abstract :
Reconfigurable hardware devices, such as FPGAs, are increasingly used in embedded systems. To utilize these devices for real-time work loads, scheduling techniques are required that generate predictable task timings. In this paper, we present a partitioning-EDF (earliest deadline first) approach to find such schedules. The FPGA area is partitioned along one dimension into slots. The tasks are partitioned into groups. Then, each group is scheduled to exactly one slot using the EDF rule. We show that the problem of finding an optimal partitioning is related to the well-known 2D level bin-packing problem. We extend a previously reported ILP model to solve our partitioning problem to optimality. By a simulation study we demonstrate that the partitioning-EDF approach is able to find feasible schedules for most task sets with a system utilization of up to 70%. Additionally, we allow a task to be realized in alternative implementations. A simulation study reveals that the scheduling performance increases considerably if three instead of one task variants are considered. Finally, we model and study the impact of the device reconfiguration time on the scheduling performance
Keywords :
bin packing; embedded systems; field programmable gate arrays; inductive logic programming; processor scheduling; reconfigurable architectures; task analysis; FPGA; ILP model; bin-packing problem; embedded system; optimal partitioning; partitioned scheduling; partitioning-earliest deadline first; periodic real-time task; predictable task timing; real-time work load; reconfigurable hardware device; reconfiguration time; system utilization; Computer science; Digital circuits; Embedded system; Field programmable gate arrays; Hardware; Logic arrays; Processor scheduling; Programmable logic arrays; Runtime; Scheduling algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International
Conference_Location :
Rhodes Island
Print_ISBN :
1-4244-0054-6
Type :
conf
DOI :
10.1109/IPDPS.2006.1639451
Filename :
1639451
Link To Document :
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