Reconfigurable communications for image processing applications

This work tries to reuse programmable communication resources like a network-on-chip (NoC) in the acceleration of image applications. We show a mathematical model for the computation and communication pattern of two distributed motion estimation algorithms, full search block matching algorithm and multi-resolution block matching algorithm. Experimental results show that the use of the multi-resolution method reduces not only the computation time but also the traffic of messages on the NoC. This leads to a lower power consumption in the NoC during the processing time of each image. The studied examples show the importance of the link between algorithms and their mapping onto a programmable fabric, not only regarding computation, but facing communication as well