Title :
Design and analysis of matching circuit architectures for a closest match lookup
Author :
McLaughlin, Kieran ; Kupzog, Friederich ; Blume, Holger ; Sezer, Sakir ; Noll, Tobias ; McCanny, John
Author_Institution :
Inst. of Electron., Commun. & Inf. Technol. at QUB
Abstract :
This paper investigates the implementation of a number of circuits used to perform a high speed closest value match lookup. The design is targeted particularly for use in a search trie, as used in various networking lookup applications, but can be applied to many other areas where such a match is required. A range of different designs have been considered and implemented on FPGA. A detailed description of the architectures investigated is followed by an analysis of the synthesis results
Keywords :
field programmable gate arrays; integrated circuit design; logic design; FPGA; matching circuit architecture; networking lookup application; search trie; value match lookup; Associative memory; Bandwidth; Cams; Circuit analysis; Computer architecture; Delay; Field programmable gate arrays; Pipelines; Quality of service; Streaming media;
Conference_Titel :
Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International
Conference_Location :
Rhodes Island
Print_ISBN :
1-4244-0054-6
DOI :
10.1109/IPDPS.2006.1639481
