DocumentCode :
2047151
Title :
A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis
Author :
Haihua Su ; Widiger, D. ; Kashyap, C. ; Liu, F. ; Krauter, B.
Author_Institution :
IBM Corp., Austin, TX, USA
fYear :
2005
fDate :
13-17 June 2005
Firstpage :
186
Lastpage :
189
Abstract :
We present a noise-driven effective capacitance method for estimating the combined propagation noise and crosstalk noise. Gate propagation noise rules are efficiently calculated inside the Ceff procedure to determine a linear Thevenin model of the victim driver. A voltage-dependent current source model (Croix and Wong, 2003 and Keller et al.,2004) of the driver, along with a load capacitor is analyzed to generate the gate output waveform, from which noise rules are directly extracted. This method removes potential errors introduced in traditional look-up table or fitted-equation based noise rules. The linear driver Thevenin model can then be employed to analyze the propagation noise, while the same Thevenin resistance can be used to analyze the crosstalk noise. The combined coupling and propagation noise can then be estimated using superposition. In this work, we extend the popular timing-driven effective capacitance method into the noise domain. Similar to the effective capacitance method in timing analysis, this technique can successfully separate the nonlinear driver analysis from the linear interconnect analysis. In addition, the linear driver model can significantly ease the task of finding the worst-case peak alignment among all the victim and aggressor noise sources. Experimental results on both RC and RLC nets from industry designs show both accuracy and efficiency compared to SPICE results.
Keywords :
CMOS integrated circuits; capacitance; circuit analysis computing; digital integrated circuits; driver circuits; integrated circuit modelling; integrated circuit noise; nonlinear network analysis; RC nets; RLC nets; SPICE; Thevenin model; Thevenin resistance; crosstalk noise; current source model; effective capacitance method; fitted-equation; functional noise analysis; gate output waveform; gate propagation noise; industry design; linear driver model; linear interconnect analysis; look-up table; noise rule calculation; noise rules; nonlinear driver analysis; timing analysis; Algorithm design and analysis; Capacitance; Circuit noise; Crosstalk; Driver circuits; Integrated circuit noise; Performance analysis; Permission; Radio access networks; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2005. Proceedings. 42nd
Conference_Location :
Anaheim, CA
Print_ISBN :
1-59593-058-2
Type :
conf
DOI :
10.1109/DAC.2005.193798
Filename :
1510317
Link To Document :
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