Title :
Design space exploration for low-power reconfigurable fabrics
Author :
Mehta, Gayatri ; Hoare, Raymond R. ; Stander, Justin ; Jones, Alex K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Pittsburgh Univ., PA
Abstract :
This paper presents a parameterizable, coarse grained, reconfigurable fabric model that attempts to maintain field programmable gate array (FPGA)-like programmability and computer aided design (CAD), with application specific integrated circuit (ASIC)-like power characteristics for digital signal processing (DSP) style applications. Using this model, architectural design space decisions are explored in order to define an energy-efficient fabric. The impact on energy and performance due to the variation of different parameters such as data width and interconnection flexibility has been studied. The multiplexer cardinality usage has also been studied by mapping some of the signal processing applications onto the fabric. The results point to the use of power optimized 32-bit width computational elements interconnected by low cardinality multiplexers like 4:1 multiplexers
Keywords :
application specific integrated circuits; field programmable gate arrays; logic CAD; multiplexing equipment; ASIC-like power characteristic; CAD; FPGA-like programmability; application specific integrated circuit; computer aided design; data width; digital signal processing; field programmable gate array; interconnection flexibility; low-power reconfigurable fabric; multiplexer cardinality usage; signal processing application; Application specific integrated circuits; Design automation; Digital signal processing; Fabrics; Field programmable gate arrays; Integrated circuit interconnections; Integrated circuit modeling; Multiplexing; Signal design; Space exploration;
Conference_Titel :
Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International
Conference_Location :
Rhodes Island
Print_ISBN :
1-4244-0054-6
DOI :
10.1109/IPDPS.2006.1639484