Title :
Hardware Assisted Address Monitoring System
Author :
Rahimunnisa, K. ; Anoop Suraja, A. ; Kavya, T.S.
Author_Institution :
Karunya Univ., Coimbatore, India
Abstract :
Security is emerging as an important concern in embedded system design. Security of an embedded system is compromised when software that can be trusted is resulting in unintended behaviour such as leakage of sensitive data and execution of spiteful code. Several counter measures have been proposed to counteract these sorts of intrusions. The general idea behind most of the methods is to define the security policy at system level and check for security breach either statically or at run time. A hardware assisted run time address monitoring system is presented here to enhance embedded system security by detecting and preventing unintended program behaviour. The embedded processor is augmented with the hardware monitor that observes the dynamic execution trace of the processor. It checks whether the execution trace falls within the allowed program behaviour, and flags any deviation from the expected behaviour. This technique can counteract several common software and physical attacks. Furthermore it can ensure secure program execution with minimal overheads.
Keywords :
monitoring; security of data; embedded system security; hardware assisted address monitoring system; Application software; Buffer overflow; Communication system security; Computer architecture; Data security; Embedded software; Embedded system; Hardware; Information security; Monitoring; Security; embedded processors; run-time checks; secure architectures;
Conference_Titel :
Computer Engineering and Applications (ICCEA), 2010 Second International Conference on
Conference_Location :
Bali Island
Print_ISBN :
978-1-4244-6079-3
Electronic_ISBN :
978-1-4244-6080-9
DOI :
10.1109/ICCEA.2010.109