DocumentCode :
2047783
Title :
A new dynamic fast-settling low dropout regulator with programmable output voltage
Author :
Chang, Hsiang-Hsiung ; Shen, Jsung-Mo ; Yang, Wei-Bin ; Lo, Yu-Lung
Author_Institution :
Dept. of Electr. Eng., Tamkang Univ., Taipei, Taiwan
fYear :
2010
fDate :
21-24 Nov. 2010
Firstpage :
1110
Lastpage :
1113
Abstract :
The new dynamic fast settling low dropout regulator (LDO) is presented for minimizing setting time in voltage switched by utilizing the multi-voltage control technique and dynamic fast-settling mechanism The proposed LDO provides multiple discrete voltage levels of output by using multi-voltage control technique Meanwhile, the settling time is reduced by utilizing dynamic fast-settling mechanism during output voltage switched Furthermore, we propose the new comparator architecture to avoid the problems of overcharging and over-discharging at feedback node Vp and output node Vout. The simulation results are based on 0.35μm CMOS process. The transient time of the proposed LDO is reduced from 4.2ms to 22fis. Moreover, the power dissipation of the multi-voltage control and dynamic fast-settling mechanism is only 0.3mWin a heavy load condition.
Keywords :
CMOS integrated circuits; comparators (circuits); voltage control; CMOS process; LDO; comparator architecture; discrete voltage levels; dynamic fast-settling low-dropout regulator; feedback node; multivoltage control technique; output node; power 0.3 mW; power dissipation; programmable output voltage; size 0.35 mum; time 4.2 ms to 22 mus;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON 2010 - 2010 IEEE Region 10 Conference
Conference_Location :
Fukuoka
ISSN :
pending
Print_ISBN :
978-1-4244-6889-8
Type :
conf
DOI :
10.1109/TENCON.2010.5686417
Filename :
5686417
Link To Document :
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