Title :
Testability, debuggability, and manufacturability features of the UltraSPARC-I microprocessor
Author :
Levitt, Marc E. ; Nori, Srinivais ; Narayanan, Sridhar ; Grewal, GP ; Youngs, Lynn ; Jones, Anjali ; Billus, Greg ; Paramanandam, Siva
Author_Institution :
SPARC Technol. Bus., Sun Microsyst. Inc., Mountain View, CA, USA
Abstract :
This paper describes the testability, debuggability, and manufacturability features of the UltraSPARC-I microprocessor. Due to the aggressive nature of this high performance design, these three areas needed to be addressed at the beginning of the project to ensure success. We present the goals and analysis that lead to our decisions as well as the actual features that were implemented. The features described in this paper have helped enormously in achieving the time-to-volume goals and hence the overall success of the product
Keywords :
CMOS digital integrated circuits; automatic testing; boundary scan testing; circuit CAD; computer architecture; computer testing; cost-benefit analysis; design for manufacture; design for testability; integrated circuit design; integrated circuit testing; 167 MHz; 3.3 V; 64 bit; IDDQ; SPARC V9 architecture; UltraSPARC-I microprocessor; boundary scan cell design; clocking; cost benefit analysis; custom circuit blocks; debuggability; decoded multiplexor; embedded array testing; global scan architecture; high performance design; manufacturability features; memory arrays; observability bus; precharged logic; state element design; static CMOS controller; superscalar SPARC; test generation flow; testability; time-to-volume goals; Buffer storage; CMOS technology; Failure analysis; Manufacturing; Microprocessors; Packaging; Statistics; Sun; Testing; Videoconference;
Conference_Titel :
Test Conference, 1995. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2992-9
DOI :
10.1109/TEST.1995.529829
