• DocumentCode
    2048007
  • Title

    Analysis and Integrated Architecture Design for Overlap Smooth and in-Loop Deblocking Filter in VC-1

  • Author

    Lee, Yen-Lin ; Nguyen, Truong

  • Author_Institution
    UCSD, La Jolla
  • Volume
    5
  • fYear
    2007
  • fDate
    Sept. 16 2007-Oct. 19 2007
  • Abstract
    Unlike familiar macroblock-based in-loop deblocking filter in H.264, the filters of VC-1 perform all horizontal edges (for in-loop deblocking filtering) or vertical edges (for overlap smoothing) first and then the other directional filtering edges. The entire procedure is very time-consuming and with high memory access loading for the whole system. This paper presents a novel method and the efficient integrated architecture design, which involves an 12 times 12 overlapped block that combines overlap smoothing with loop filtering for performance and cost by sharing circuits and resources. This architecture has capability to process HDTV1080p 30 fps video and HDTV 2048 times 1536 24 fps video at 180 MHz. The same concept is applicable to other video processing algorithms, especially in deblocking filter for video post-processing in a frame-based order.
  • Keywords
    filtering theory; video coding; H.264; HDTV; HDTV1080p; VC-1; directional filtering; in-loop deblocking filter; overlap smooth filter; video processing algorithms; Automatic voltage control; Circuits; Codecs; Costs; Decoding; Encoding; Filtering; Optical filters; Smoothing methods; Video sharing; Overlap smoothing; SMPTE-421M; VC-1; VLSI architecture; in-loop deblocking filter;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Image Processing, 2007. ICIP 2007. IEEE International Conference on
  • Conference_Location
    San Antonio, TX
  • ISSN
    1522-4880
  • Print_ISBN
    978-1-4244-1437-6
  • Electronic_ISBN
    1522-4880
  • Type

    conf

  • DOI
    10.1109/ICIP.2007.4379792
  • Filename
    4379792