Title :
Integrated test solutions and test economics for MCMs
Author :
Kornegay, Kevin T. ; Roy, Kaushik
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
Multichip Modules (MCMs) use complex digital, analog, and mixed-signal chips on a single substrate from different vendors. To ensure quality of die and the functionality and performance of MCMs, extensive testing is required at all levels. This paper presents structured test methodologies for MCMs. The economics associated with these methodologies and their relative cost at the MCM level are also presented
Keywords :
IEEE standards; automatic testing; boundary scan testing; built-in self test; delays; design for testability; economics; integrated circuit manufacture; integrated circuit testing; mixed analogue-digital integrated circuits; multichip modules; BIST; DFT; MCM testing; assembled module testing; boundary scan; delay testing; hybrid MCM; integrated test solutions; mixed signal test bus; relative costs; shared I/O scan test architecture; structured test methodologies; substrate testing; test economics; wafer and die testing; Analog computers; Assembly; Circuit testing; Costs; Design for testability; Electron beams; Flip chip; Multichip modules; Packaging; Probes;
Conference_Titel :
Test Conference, 1995. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2992-9
DOI :
10.1109/TEST.1995.529833
