Comparative performance analysis of Dual-X CCII designed using bulk CMOS & hybrid approach at 32nm node

The paper presents the performance comparison of a wide bandwidth Dual-X Current Conveyor, designed using CMOS and Hybrid approaches at 32nm technology node. A hybrid configuration is obtained by utilizing both CMOS and CNFET on the same chip. CNFETs seems to be a good prospect for extending the saturating Moore´s Law because of it´s higher mobility, scalability and better channel electrostatics. 3-dB current bandwidth, port-resistances along with power consumption have been chosen as the key parameters for comparison. The work in this paper shows that through properly designed hybrid configuration, an edge in performance could be obtained over Si CMOS, thus making it a good proposition for ultra wideband circuits and systems.