Title :
Architecture-adaptive range limit windowing for simulated annealing FPGA placement
Author :
Eguro, Ken ; Hauck, Scott ; Sharma, Akshay
Author_Institution :
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Abstract :
Previous research has shown both theoretically and practically that simulated annealing could greatly benefit from the incorporation of an adaptive range limiting window to control the acceptance ratio of swaps during placement. However, the implementation of such a system is not necessarily obvious. Existing range limiting techniques have several fundamental shortcomings when dealing with both standard island-style FPGAs and more exotic architectures. In this paper the authors discussed the nature of these problems and presented a new algorithm that attempts to deal with these issues.
Keywords :
field programmable gate arrays; logic design; network routing; reconfigurable architectures; simulated annealing; FPGA placement; acceptance ratio; architecture adaptive range limit windowing; range limiting techniques; reconfigurable logic; simulated annealing; Adaptive control; Circuit simulation; Cooling; Cost function; Field programmable gate arrays; Permission; Programmable control; Routing; Simulated annealing; Temperature distribution;
Conference_Titel :
Design Automation Conference, 2005. Proceedings. 42nd
Print_ISBN :
1-59593-058-2
DOI :
10.1109/DAC.2005.193849