A Real-Time H.264 BP Decoder based on a DM642 DSP

Author

Pescador, F. ; Garrido, M. JX ; Sanz, C. ; Juarez, E. ; Groba, A.M. ; Samper, D.

Author_Institution

Univ. Politec. de Madrid, Madrid, Spain

fYear

2007

fDate

24-27 Nov. 2007

Firstpage

1491

Lastpage

1494

Abstract

In this paper, the implementation of a baseline profile H.264 decoder based on a DM 642 digital signal processor is described. An initial standard compliant raw-C decoder has been optimized in speed for the target processor. The parallelism between algorithm execution and data movement has been fully exploited using DMA. Also, critical parts of the algorithm have been encoded directly in assembly code to increase the number of instructions per cycle. The decoder has been tested in simulation with actual (transcoded) DVD and digital TV streams. According to these tests, standard definition real time decoding can be obtained with a DM 642@600 MHz.

Keywords

decoding; digital signal processing chips; video codecs; video coding; DM642 digital signal processor; DSP; DVD streams; baseline profile H.264 decoder; compliant raw-C decoder; data movement; digital TV streams; real time decoding; video coding standards; video decoding algorithms; Computer architecture; Costs; Decoding; Digital TV; Digital signal processing; Digital signal processors; MPEG 4 Standard; Signal processing algorithms; Testing; Video coding; Digital Signal Processor; H.264; digital TV; real time systems; video codecs;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing and Communications, 2007. ICSPC 2007. IEEE International Conference on

Conference_Location

Dubai

Print_ISBN

978-1-4244-1235-8

Electronic_ISBN

978-1-4244-1236-5

Type

conf

DOI

10.1109/ICSPC.2007.4728613

Filename

4728613