Linearity improvement of double differential pair CMOS OTA using quasi-floating-gate technique

A new configuration of a linearised operational transconductor amplifier (OTA) using double differential pair with source degeneration block is proposed in this paper. Double differential structure is used to cancel out the even order harmonics. The Source degeneration block of double differential pair is implemented by “Tunable linear Quasi-Floating-Gate (QFG) transistor operating in the triode mode”. Conventional quasi-floating MOS resistors are implemented using a large resistance. This large value of floating biasing resistor is implemented using MOS transistor operating in subthreshold region. The transconductor is implemented using UMC 0.18 μm CMOS technology with 1.8 V supply voltage at room temperature (27°C). The experimental results shows that Second Harmonic Distortion (HD2) of -144.9 dB for 0.5 V_pp at 40KHz and the power consumption is 527.4 μw with 1.8V supply voltage.