User application of statistical process monitor techniques to ASIC critical parameters

The collection of meaningful data is important in understanding sources of variation in the IC manufacturing process, leading to continuous improvement and thus reduced variation and waste. The results of applying SPM to 5 ASICs revealed the following: (1) The IC manufacturing processes based on the process parameters that were measured are reasonably well controlled and capable. Several parameters (Ratio P/N and P/N Strength) exhibited process shifts for early lots of devices received but settled-down in subsequent lots. (2) The process models accurately reflect the process. (3) The design model/library matches the process. There is good correlation between (a) fault coverage based on the SSAF model and the defective ppm levels measured at 100% incoming inspection test and, (b) SPM data taken and 100% incoming functional test results. (5) Due to the small process variation and low ppm levels incurred at incoming inspection test, it was decided to: (a) reduce the critical parameter sample size from 100 to 18 and, (b) reduce 100% functional incoming inspection testing of each lot to skip lot testing (100% of each fifth lot). There was no significant discernible difference between the results from 100 sample lot size SPM tests and 18 sample size SPM tests