DocumentCode
2049410
Title
Multilayer perceptron with on-chip learning using stochastic ratio pulse arithmetic
Author
Kim, EungSoo ; Cho, Duk Yun
Author_Institution
Dept. of Electron. & Inf. Commun. Eng., Sunmoon Univ., Chung-nam, South Korea
Volume
2
fYear
1999
fDate
1999
Firstpage
566
Abstract
The necessity of the hardware implementation of neural networks is discussed. However, it is difficult to realize compact operators into a small silicon area. Therefore we used the ratio pulse method in stochastic arithmetic, and the representation of the ratio of ones and zeros in its random pulse stream. The ratio method has the advantage that it reduces the size of operators in neural networks. This paper proposes learning algorithms, using ratio pulse arithmetic, for an on-chip neural network with circuits
Keywords
digital arithmetic; feedforward neural nets; learning (artificial intelligence); multilayer perceptrons; neural chips; stochastic processes; circuits; learning algorithms; multilayer perceptron; on-chip learning; on-chip neural network; random pulse stream; stochastic ratio pulse arithmetic; Arithmetic; Large Hadron Collider; Multilayer perceptrons; Network-on-a-chip; Neural networks; Neurons; Petroleum; Stochastic processes;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Information Processing, 1999. Proceedings. ICONIP '99. 6th International Conference on
Conference_Location
Perth, WA
Print_ISBN
0-7803-5871-6
Type
conf
DOI
10.1109/ICONIP.1999.845656
Filename
845656
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