DocumentCode
2049850
Title
VLSI design of a sigma-delta bitstream FIR filter
Author
Summerfield, S. ; Kershaw, S.M. ; Sandler, M.B.
Author_Institution
Dept. of Eng., Warwick Univ., Coventry, UK
fYear
1990
fDate
25-25 May 1990
Firstpage
42430
Lastpage
42434
Abstract
This paper considers a method for designing filters with analogue I/O and internal digital signal processing based on sigma-delta modulation and operations performed directly on the bitstream. This has potential applications in audio systems. Simulations verify equivalent 16-bit performance of a bitstream FIR filter. The VLSI layout of such filters is highly regular and an evaluation of a preliminary design indicates that bitstream filtering is a viable alternative to decimation followed by PCM filtering.<>
Keywords
CMOS digital integrated circuits; FIR filters; VLSI; digital filters; digital signal processing chips; integrated circuit layout; sigma-delta modulation; CMOS IC; VLSI design; VLSI layout; analogue I/O; audio system applications; bitstream FIR filter; internal digital signal processing; sigma-delta bitstream; sigma-delta modulation; CMOS digital integrated circuits; Digital filters; Digital signal processors; FIR digital filters; Integrated circuit layout; Sigma-delta modulation; Very-large-scale integration;
fLanguage
English
Publisher
iet
Conference_Titel
Digital and Analogue Filters and Filtering Systems, IEE Colloquium on
Conference_Location
London, UK
Type
conf
Filename
472886
Link To Document