DocumentCode :
2050047
Title :
Variation-tolerant circuits: circuit solutions and techniques
Author :
Tschanz, Jim ; Bowman, Keith ; De, Vivek
Author_Institution :
Circuit Res. Lab, Intel Corp., Hillsboro, OR, USA
fYear :
2005
fDate :
13-17 June 2005
Firstpage :
762
Lastpage :
73
Abstract :
Die-to-die and within-die variations impact the frequency and power of fabricated dies, affecting functionality, performance, and revenue. Variation-tolerant circuits and post-silicon tuning techniques are important for minimizing the impacts of these variations. This paper describes several circuit techniques that can be employed to ensure efficient circuit operation in the presence of ever-increasing variations.
Keywords :
integrated circuit design; body bias; circuit solutions; circuit techniques; die-to-die variations; parameter variation; post-silicon tuning techniques; variation-tolerant circuits; within-die variations; Circuit optimization; Clocks; Delay; Energy consumption; Fluctuations; Frequency; Logic arrays; Microprocessors; Temperature; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2005. Proceedings. 42nd
Print_ISBN :
1-59593-058-2
Type :
conf
DOI :
10.1109/DAC.2005.193915
Filename :
1510435
Link To Document :
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