Title :
Parallel genetic algorithm for SPICE model parameter extraction
Author :
Li, Yiming ; Cho, Yen-Yu
Author_Institution :
Dept. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
Models of simulation program with integrated circuit emphasis (SPICE) are currently playing a central role in the connection between circuit design and chip fabrication communities. An automatic model parameter extraction system that simultaneously integrates evolutionary and numerical optimization techniques for optimal characterization of very large scale integration (VLSI) devices has recently been advanced (Li and Cho, 2004). In this paper, to accelerate the extraction process, a parallelization of the genetic algorithm (GA) for VLSI device equivalent circuit model parameter extraction is developed. The GA implemented in the extraction system is mainly parallelized with a diffusion scheme on a PC-based Linux cluster with message passing interface libraries. Parallelization of GA is governed by many factors, which affect the quality of extracted parameters and its efficiency. The diffusion GA is superior to an isolated GA, and the superiority of the diffusion GA is significant when the number of devices to be optimized is increased. Theoretical estimation and preliminary implementation show that there is an optimal number of processors with respect to the number of devices to be extracted. Benchmark results, such as speedup and efficiency including accuracy of extraction are presented and discussed for different sets of realistic multiple VLSI devices to show the robustness and efficiency of the method. We believe that the practical implementation of the parallel GA approach benefits the engineering of SPICE model parameter extraction in modern electronic industry.
Keywords :
SPICE; VLSI; equivalent circuits; genetic algorithms; integrated circuit design; integrated circuits; message passing; parallel algorithms; PC-based Linux cluster; SPICE model; VLSI devices; chip fabrication; circuit design; diffusion scheme; electronic industry; equivalent circuit model; integrated circuit; message passing interface libraries; parallel genetic algorithm; parameter extraction; very large scale integration; Acceleration; Chip scale packaging; Circuit synthesis; Equivalent circuits; Genetic algorithms; Integrated circuit modeling; Linux; Parameter extraction; SPICE; Very large scale integration;
Conference_Titel :
Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International
Print_ISBN :
1-4244-0054-6
DOI :
10.1109/IPDPS.2006.1639609