Deterministic approaches to analog performance space exploration (PSE)

Author

Mueller, Daniel ; Stehr, Guido ; Graeb, Helmut ; Schlichtmann, Ulf

Author_Institution

Inst. for Electron. Design Autom., Tech. Univ. Munchen, Munich, Germany

fYear

2005

fDate

13-17 June 2005

Firstpage

869

Lastpage

874

Abstract

Performance space exploration (PSE) determines the range of feasible performance values of a circuit block for a given topology and technology. In this paper, we present two deterministic approaches for PSE. One approximates the feasible performance space based on linearized circuit models and is suitable for investigating a large number of performances. The other one computes discretizations of the Pareto front of competing performances. In addition, a motivation and application of PSE using a hierarchical design example is presented.

Keywords

Pareto optimisation; analogue integrated circuits; circuit optimisation; integrated circuit design; network topology; Fourier Motzkin elimination; Pareto optimization; analog integrated circuits; analog performance space exploration; deterministic approaches; linearized circuit models; Analog integrated circuits; Circuit simulation; Circuit synthesis; Computational modeling; Constraint optimization; Design optimization; Electronic design automation and methodology; Permission; Space exploration; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2005. Proceedings. 42nd

Print_ISBN

1-59593-058-2

Type

conf

DOI

10.1109/DAC.2005.193937

Filename

1510457