DocumentCode
2051965
Title
Applying Time Warp to CPU design
Author
Pearson, Murray W. ; Littin, Richard H. ; McWha, J. A David ; Cleary, John G.
Author_Institution
Dept. of Comput. Sci., Waikato Univ., Hamilton, New Zealand
fYear
1997
fDate
18-21 Dec 1997
Firstpage
290
Lastpage
295
Abstract
This paper exemplifies the similarities in Time Warp and computer architecture concepts and terminology, and the continued trend for convergence of ideas in these two areas. Time Warp can provide a means to describe the complex mechanisms being used to allow the instruction execution window to be enlarged. Furthermore it can extend the current mechanisms, which do not scale, in a scalable manner. The issues involved in implementing Time Warp in a CPU design are also examined, and illustrated with reference to the Wisconsin Multiscalar machine and the Waikato WarpEngine. Finally the potential performance gains of such a system are briefly discussed
Keywords
logic CAD; multiprocessing systems; parallel architectures; parallel machines; performance evaluation; time warp simulation; virtual machines; CPU design; Time Warp; Waikato WarpEngine; Wisconsin Multiscalar machine; computer architecture; instruction execution window; performance gains; scalable; terminology; Clocks; Computer architecture; Computer science; Dynamic scheduling; Hardware; Out of order; Parallel processing; Process design; Processor scheduling; Production;
fLanguage
English
Publisher
ieee
Conference_Titel
High-Performance Computing, 1997. Proceedings. Fourth International Conference on
Conference_Location
Bangalore
Print_ISBN
0-8186-8067-9
Type
conf
DOI
10.1109/HIPC.1997.634505
Filename
634505
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