DocumentCode
2052166
Title
Fault Injection Framework for embedded memories
Author
Skoncej, Patryk
Author_Institution
IHP, Frankfurt (Oder), Germany
fYear
2013
fDate
2-4 Oct. 2013
Firstpage
77
Lastpage
82
Abstract
Due to scalability issues of existing semiconductor memories emerging non-volatile memory technologies are gaining increasing interest. Their promising features like non-volatility, low-power consumption, and great scalability are expected to meet demands of upcoming digital systems. Unfortunately, due to their characteristics they often require special management. Moreover, due to certain properties, e.g. like limited endurance, their applicability in some cases can be restricted. As a result, selection of a non-volatile technology appropriate for a target system can be difficult. This paper proposes an approach which facilitates a design process of a system incorporating non-volatile memories. It presents a tool which generates non-volatile memory model which can be used not only in system´s simulations but also in emulations in hardware.
Keywords
embedded systems; fault diagnosis; random-access storage; semiconductor device models; semiconductor device testing; semiconductor storage; design process; embedded memories; fault injection framework; nonvolatile memory model; nonvolatile memory technologies; scalability issues; semiconductor memories; system simulations; Computer aided manufacturing; Data models; Emulation; Hardware design languages; Memory management; Nonvolatile memory; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2013 IEEE International Symposium on
Conference_Location
New York City, NY
ISSN
1550-5774
Print_ISBN
978-1-4799-1583-5
Type
conf
DOI
10.1109/DFT.2013.6653586
Filename
6653586
Link To Document