DocumentCode :
2052235
Title :
Low power and high speed current-mode memristor-based TLGs
Author :
Dara, Chandra Babu ; Haniotakis, Themistoklis ; Tragoudas, Spyros
Author_Institution :
ECE Dept., Southern Illinois Univ., Carbondale, IL, USA
fYear :
2013
fDate :
2-4 Oct. 2013
Firstpage :
89
Lastpage :
94
Abstract :
A new clocked design that uses memristors in current mode logic implementation of threshold logic gates is presented. Memristor based designs have high potential to improve performance and energy over purely CMOS-based current mode logic implementations. The proposed design is clocked, and outperforms a recently proposed combinational method in performance as well as energy consumption. A fault tolerant implementation is analyzed, and it is experimentally verified that scales well in both energy consumption and delay.
Keywords :
current-mode logic; logic gates; low-power electronics; memristors; threshold logic; clocked design; current mode logic implementation; energy consumption; fault tolerant implementation; high speed current-mode memristor-based TLG; low power TLG; threshold logic gates; Abstracts; Circuit faults; Discrete Fourier transforms; Integrated circuit modeling; Logic gates; Memristors; Performance evaluation; Memristor; Threshold logic gates; current mode; operating speed; power;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2013 IEEE International Symposium on
Conference_Location :
New York City, NY
ISSN :
1550-5774
Print_ISBN :
978-1-4799-1583-5
Type :
conf
DOI :
10.1109/DFT.2013.6653588
Filename :
6653588
Link To Document :
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