DocumentCode
2052496
Title
IC performance prediction system
Author
Ramakrishnan, V. ; Walker, D.M.H.
Author_Institution
Intel Corp., Santa Clara, CA, USA
fYear
1995
fDate
21-25 Oct 1995
Firstpage
336
Lastpage
344
Abstract
This paper presents a methodology for predicting the electrical performance of integrated circuits prior to packaging and final test. A simulation-based approach is used to build response surface prediction models. The work focuses on determining the optimal set of test measurements required for on-line product-based control, package selection, binning and die selection for MCMs
Keywords
circuit analysis computing; integrated circuit modelling; integrated circuit packaging; integrated circuit testing; multichip modules; IC performance prediction; MCMs; binning; die selection; electrical performance; on-line product-based control; package selection; response surface prediction models; simulation-based approach; test measurements; Circuit testing; Costs; Fabrication; Foundries; Integrated circuit packaging; Integrated circuit testing; Packaging machines; Predictive models; Semiconductor device packaging; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1995. Proceedings., International
Conference_Location
Washington, DC
ISSN
1089-3539
Print_ISBN
0-7803-2992-9
Type
conf
DOI
10.1109/TEST.1995.529858
Filename
529858
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