A framework for hardware-based DVFS management in multicore mixed-criticality systems

With a paradigm shift to the multicore era, the analysis of power management techniques has become crucial. Besides, allowing applications at different levels of criticality to run on the same platform introduces higher complexity to the power and performance analysis of System-on-Chips. This work presents a system-level simulation framework and an architectural template for power management in multicore mixed-criticality systems to cope with this problem. The framework provides an efficiently emulated dynamic voltage and frequency scaling (DVFS) through full-system simulation. The architectural template uses a hardware-dedicated power manager and a real-time monitoring mechanism for critical applications. The power manager is able to guarantee criticality requirements while showing significant reduction in power consumption in experimental evaluations.