DocumentCode :
2052647
Title :
Analyzing circuit vulnerability to hardware Trojan insertion at the behavioral level
Author :
Salmani, Hassan ; Tehranipoor, Mohammad
Author_Institution :
Electr. & Comput. Eng, Univ. of Connecticut, Storrs, CT, USA
fYear :
2013
fDate :
2-4 Oct. 2013
Firstpage :
190
Lastpage :
195
Abstract :
Considerable attention has been paid to hardware Trojan detection and prevention. However, there is no existing systematic approach to investigate circuit vulnerability to hardware Trojan insertion during development. We present such an approach to investigate circuit vulnerability to Trojan insertion at the behavioral level. This novel vulnerability analysis determines a circuit´s susceptibility to Trojan insertion based on statement hardness analysis as well as observability of circuit signals. Further, the Trojan detectability metric is introduced to quantitatively compare the detectability of behavioral Trojans inserted into different circuits. This creates a fair comparison for analyzing the strengths and weaknesses of Trojan detection techniques as well as helping verify trustworthiness of a third party Intellectual Property (IP).
Keywords :
industrial property; invasive software; network analysis; behavioral level; circuit vulnerability; hardware Trojan insertion; statement hardness analysis; third party Intellectual Property; Algorithm design and analysis; Benchmark testing; Discrete Fourier transforms; Hardware; Observability; Trojan horses; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2013 IEEE International Symposium on
Conference_Location :
New York City, NY
ISSN :
1550-5774
Print_ISBN :
978-1-4799-1583-5
Type :
conf
DOI :
10.1109/DFT.2013.6653605
Filename :
6653605
Link To Document :
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