DocumentCode :
2052744
Title :
Investigation of the influence of process and design on soft error rate in integrated CMOS technologies thanks to Monte Carlo simulation
Author :
Weulersse, C. ; Bougerol, A. ; Hubert, G. ; Wrobel, F. ; Carriere, T. ; Gaillard, R. ; Buard, N.
Author_Institution :
EADS IW, Suresnes
fYear :
2008
fDate :
April 27 2008-May 1 2008
Firstpage :
729
Lastpage :
730
Abstract :
This work shows the capabilities of Monte Carlo simulation based on nuclear database to identify the influence of device parameters and process on Single Cell Upset and Multicell Upset rates in integrated bulk and SOI CMOS technologies up to 65 nm. The method is applicable both to SRAM and logic cells, and is valid for high energy and thermal neutrons.
Keywords :
CMOS integrated circuits; Monte Carlo methods; Monte Carlo simulation; integrated CMOS technologies; logic cells; multicell upset rates; single cell upset rate; soft error rate; thermal neutrons; CMOS logic circuits; CMOS process; CMOS technology; Databases; Error analysis; Neutrons; Process design; Random access memory; Silicon on insulator technology; Sliding mode control; CMOS; Monte Carlo simulation; Single Events; Soft Error Rate (SER); neutrons; nuclear database;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium, 2008. IRPS 2008. IEEE International
Conference_Location :
Phoenix, AZ
Print_ISBN :
978-1-4244-2049-0
Electronic_ISBN :
978-1-4244-2050-6
Type :
conf
DOI :
10.1109/RELPHY.2008.4559010
Filename :
4559010
Link To Document :
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